Low dropout linear regulator parameters and advantages and disadvantages - Delixi

Create Date: 2024-8-30 12:03:23|Source: Delixi

Grounding current, also become quiescent current, load regulation (the smaller this value, the stronger the LDO can press the load) linear regulation (the smaller, the input voltage has less influence on the output voltage, the better the LDO function) power supply ratio (PSSR), reflecting the Delixi LDO to the interference signal of the ability to press.

                            Low dropout linear regulator parameters and advantages and disadvantages - Delixi

Low-dropout (LDO) linear regulators have low cost, low noise, low quiescent current, few external components, typically only one or two bypass capacitors, and have very low built-in noise and a high PSRR (Power Supply Rejection Ratio). LDO is a miniature system-on-chip (SoC) with very low self-consumption. It can be used for current master channel control, and the chip integrates hardware circuits such as MOSFETs with very low on-line resistance, Schottky diodes, sampling resistors, and voltage divider resistors, and has functions such as over-current maintenance, over-temperature maintenance, fine reference, differential amplifier, and retarder. PG is a new generation of LDOs, which can also be called Power Good, which can also be called "good power supply or stable power supply". Many LDOs only need to connect one capacitor at the input and one output to operate reliably.

The new LDO achieves the following specifications: output noise of 30 μV, PSRR of 60 dB, quiescent current of 6 μA, and voltage drop of only 100 mV. The main reason for the improvement of the function of the LDO linear regulator is that the adjustment tube used in it is a P-channel MOSFET, and the P-channel MOSFET is voltage-driven, which does not require current, which reduces the current consumed by the device itself, and the voltage drop on it is roughly equal to the product of the output current and the on-resistance. Since the on-resistance of a MOSFET is small, the voltage drop across it is very low. Conventional linear regulators use PNP transistors. In circuits where PNP transistors are selected, the voltage drop between the input and output should not be too low to prevent the PNP transistor from entering a saturation condition and reducing the output capacity.

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